EC5822|10MHz,Low-Power,Rail-To-Rail Dual OP Amp


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10MHz, Low-Power, CMOS,

Rail-to-Rail Dual Operational Amplifier

EC5822

 

 

 

General Description

 

The  ​​​​ EC5822  ​​​​ is  ​​​​ wideband,  ​​​​ low-noise,  ​​​​ low-distortion  ​​​​ dual  ​​​​ operational  ​​​​ amplifier,  ​​​​ that ​​ offer  ​​​​ rail-to-rail  ​​​​ inputs/outputs  ​​​​ and single-supply ​​ operation ​​ down ​​ to ​​ 2.2V. ​​ They ​​ draw ​​ 1.6mA ​​ of ​​ quiescent ​​ supply ​​ current ​​ while ​​ featuring ​​ ultra-low ​​ distortion(0.0002% ​​ THD+N), ​​ as ​​ well ​​ as ​​ low input ​​ voltage-noise ​​ density ​​ (15nV/Hz) ​​ and ​​ low input current-noise ​​ density ​​ (0.5fA/Hz).

These features make the devices an ideal choice for applications that require low distortion and/or low noise.

These amplifiers have inputs and outputs which swing rail-to-rail and their input common-mode voltage range includes ground.

The ​​ maximum ​​ input ​​ offset ​​ of ​​ these ​​ amplifiers ​​ is ​​ less ​​ than ​​ 5mV. ​​ The ​​ EC5822 ​​ are ​​ unity-gain ​​ stable ​​ with ​​ a ​​ gain-bandwidth product ​​ of 10MHz.The ​​ EC5822 ​​ is ​​ available ​​ in ​​ SOP8 ​​ and ​​ MSOP8 ​​ packages. ​​ The ​​ extended ​​ temperature ​​ range ​​ of ​​ -40°C ​​ to +125°C over all supply voltages offers additional design flexibility.

Features

 

Single-Supply Operation from +2.2V ~ +5.5V

Rail-to-Rail Input / Output

Gain-Bandwidth Product: 10MHz (Typ.)

Low Input Bias Current: 10pA (Typ.)

Low Offset Voltage:5mV(Max.)

​​ Quiescent Current: 800μA per Amplifier (Typ.)

​​ Operating Temperature: -40°C ~ +125°C

​​ Available in SOP8 and MSOP8 Packages

 

 

 

 

 

 

 

Applications

 

 

Portable Equipment

Mobile Communications

Smoke Detector

Sensor Interface

Medical Instrumentation

Battery-Powered Instruments

Handheld Test Equipment

 

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Pin Assignments

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Figure 1. Pin Assignment Diagram (SOP8 and MSOP8 Package)

 

 

 

 

10MHz, Low-Power, CMOS,

Rail-to-Rail Dual Operational Amplifier

EC5822

 

 

Ordering Information

 ​​ ​​​​ EC5822NN XX ​​ X

 

​​ R1MSOP-8L

​​ M1SOP-8L

 

 

​​ 

 

 

 

 

 

 

 

 

 

 

 

Part Number

Package

Marking

Marking Information

EC5822NNR1R

MSOP-8L

5822

LLLLL

YYWWT

1. LLLLL:Last five Number of Lot No

2. YY:Year Code

3. WW:Week Code

4. T:Internal Tracking Code

EC5822NNM1R

SOP-8L

​​ EC5822

LLLLL

YYWWT

 

 

Application Information

 

Size

EC5822 ​​ series ​​ op ​​ amps ​​ are ​​ unity-gain ​​ stable ​​ and ​​ suitable ​​ for ​​ a ​​ wide ​​ range ​​ of ​​ general-purpose ​​ applications. ​​ The ​​ small footprints of the ​​ EC5822 series packages save space on printed circuit boards and enable the design of smaller electronic products.

 

Power Supply Bypassing and Board Layout

EC5822 series operates from a single 2.2V to 5.5V supply or dual ±1.1V to ±2.75V supplies. For best performance, a 0.1μF ceramic capacitor should be placed close to the VDD pin in single supply operation. For dual supply operation, both VDD and VSS supplies should be bypassed to ground with separate 0.1μF ceramic capacitors.

 

​​ Low Supply Current

The low supply current (typical 800μA) of EC5822 series will help to maximize battery life. They are ideal for battery powered systems

​​ 

Operating Voltage

​​ EC5822 series operate under wide input supply voltage (2.2V to 5.5V). In addition, all temperature specifications apply from -40℃ to +125℃. Most behavior remains unchanged throughout the full operating voltage range. These guarantees ensure operation throughout the single Li-Ion battery lifetime

 

Rail-to-Rail Input

The ​​ input common-mode ​​ range ​​ of ​​ EC5822 ​​ series ​​ extends ​​ 100mV beyond ​​ the ​​ supply ​​ rails ​​ (VSS-0.1V ​​ to ​​ VDD+0.1V). This ​​ is achieved by using complementary input stage. For normal operation, inputs should be limited to this range.

 

Rail-to-Rail Output

​​ Rail-to-Rail ​​ output ​​ swing ​​ provides ​​ maximum ​​ possible ​​ dynamic ​​ range ​​ at ​​ the ​​ output. ​​ This ​​ is ​​ particularly ​​ important ​​ when operating in low supply voltages. The output voltage of EC5822 series can typically swing to less than 10mV from supply rail in light resistive loads (>100kΩ), and 60mV of supply rail in moderate resistive loads (10kΩ).

 

Capacitive Load Tolerance

The EC5822 series can directly drive 250pF capacitive load in unity-gain without oscillation. Increasing the gain enhances the amplifier’s ability to drive greater capacitive loads. In unity-gain configurations, the capacitive load drive can be improved by inserting an isolation resistor RISO in series with the capacitive load, as shown in Figure 2.

 

 

 

 

 

 

 

 

 

 

Figure 2. Indirectly Driving a Capacitive Load Using Isolation Resistor

 

The ​​ bigger ​​ the ​​ RISO ​​ resistor ​​ value, ​​ the ​​ more ​​ stable ​​ VOUT ​​ will ​​ be. ​​ However, ​​ if ​​ there ​​ is ​​ a ​​ resistive ​​ load ​​ RL in ​​ parallel ​​ with ​​ the capacitive load, a voltage divider (proportional to RISO/RL) is formed, this will result in a gain error. The circuit in Figure 3 is an improvement to the one in Figure 2. RF provides the DC accuracy by feed-forward the VIN to RL. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving the phase margin in the overall feedback loop. Capacitive drive can be increased

 

 

 

 

 

 

 

 

 

 

 

Figure 3. Indirectly Driving a Capacitive Load with DC Accuracy

 

 

 

 

 

 

 

 

 

Differential amplifier

The differential amplifier allows the subtraction of two input voltages or cancellation of a signal common the two inputs. It is useful as a computational amplifier in making a differential to single-end conversion or in rejecting a common mode signal. Figure 4. shown the differential amplifier using EC5822.

 

 

 

 

 

 

 

 

 

 ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​ ​​​​ Figure 4. Differential Amplifier

 

 

 

 

 

​​ If the resistor ratios are equal (i.e. R1=R3 and R2=R4), then

 

 

 

 

Instrumentation Amplifier

The input impedance of the previous differential amplifier is set by the resistors R1, R2, R3, and R4. To maintain the high input impedance, one can use a voltage follower in front of each input as shown in the following two instrumentation amplifiers.

Three-Op-Amp Instrumentation Amplifier

The dual EC5822 can be used to build a three-op-amp instrumentation amplifier as shown in Figure 5.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 5. Three-Op-Amp Instrumentation Amplifier

 

 

 

 

The amplifier in Figure 5 is a high input impedance differential amplifier with gain of R2/R1. The two differential voltage followers assure the high input impedance of the amplifier.

 

 

 

​​ Two-Op-Amp Instrumentation Amplifier

​​ EC5822 can also be used to make a high input impedance two-op-amp instrumentation amplifier as shown in ​​ 

​​ Figure 6.

 

 

 

 

 

 

 

 

 

 

 

Figure 6. Two-Op-Amp Instrumentation Amplifier

 

 

​​ Where R1=R3 and R2=R4. If all resistors are equal, then Vo=2(VIP-VIN)

 

​​ Single-Supply Inverting Amplifier

​​ The inverting amplifier is shown in Figure 6. The capacitor C1 is used to block the DC signal going into the AC

​​ signal ​​ source VIN.The value of R1 and C1 set the cut-off frequency to ƒC=1/(2πR1C1). The DC gain is defined

​​ by VOUT=-(R2/R1)VIN

 

 

 

 

 

 

 

 

 

 

 

Figure 7. Single Supply Inverting Amplifier

 

 

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Low Pass Active Filter

The low pass active filter is shown in Figure 8. The DC gain is defined by –R2/R1. The filter has a -20dB/

decade roll-off after its corner frequency ƒC=1/(2πR3C1).

 

 

 

 

 

 

 

 

 

 

 

Figure 8. Low Pass Active Filter

 

 

Sallen-Key 2nd Order Active Low-Pass Filter

EC5822 can be used to form a 2 nd order Sallen-Key active low-pass filter as shown in Figure 9. The transfer function from VIN to VOUT is given by

 

 

 

 

 

Where the DC gain is defined by ALP=1+R3/R4, and the corner frequency is given by

 

 

 

 

 

 

The pole quality factor is given by

 

 

 

Let R1=R2=R and C1=C2=C, the corner frequency and the pole quality factor can be simplified as below

 

 

 

And Q=2-R3/R4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 9. Sanllen-Key 2nd Order Active Low-Pass Filter

 

 

Sallen-Key 2nd Order high-Pass Active Filter

The 2nd order Sallen-key high-pass filter can be built by simply interchanging those frequency selective components R1, R2, C1,and C2 as shown in Figure 10.

 

 

 

 

 

 

 

 

 

 

 

Figure 10. Sanllen-Key 2nd Order Active High-Pass Filter

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Characteristics

 

Absolute Maximum Ratings

 

Condition

Min

Max

Power Supply Voltage (VDD to Vss)

-0.5V

+7V

Analog Input Voltage (IN+ or IN-)

Vss-0.5V

VDD+0.5V

PDB Input Voltage

Vss-0.5V

+7V

Operating Temperature Range

-40°C

+125°C

Junction Temperature

+150°C

Storage Temperature Range

-65°C

+150°C

Lead Temperature (soldering, 10sec)

+300°C

Package Thermal Resistance (TA=+25)

SOP8, θJA

130°C

MSOP8, θJA

210°C

 

Note: Stress greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Characteristics

(VDD ​​ = ​​ +5V, ​​ Vss ​​ = ​​ 0V, ​​ VCM ​​ = ​​ 0V, ​​ VOUT ​​ = ​​ VDD/2, ​​ RL=100K ​​ tied ​​ to ​​ VDD/2, ​​ SHDNB ​​ = ​​ VDD,TA = ​​ -40°C ​​ to

+125°C, unless otherwise noted. Typical values are at TA =+25°C.) (Notes 1)

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Supply-Voltage Range

VDD

Guaranteed by the PSRR test

2.2

-

5.5

V

Quiescent Supply Current (per

Amplifier)

IDD

VDD = 3V

-

0.8

-

mA

VDD = 5V

-

0.8

1.2

Input Offset Voltage

VOS

TA = +25°C

-

-

5

mV

TA = -40°C to +85°C

-

-

-

TA = -40°C to +125°C

-

-

1.5

Input Offset Voltage Tempco

ΔVOS/ΔT

 

-

0.3

6

μV/°C

Input Bias Current

IB

(Note 3)

-

1

100

pA

Input Offset Current

IOS

(Note 3)

-

1

100

pA

Input Common-Mode Voltage

Range

VCM

Guaranteed by the TA = 25°C

-0.2

-

VDD+0.2

V

CMRR test TA = -40C to +125C

0

-

VDD0

Common-Mode Rejection Ratio

CMRR

Vss-0.2VVCMVDD+0.2V

TA = +25°C

-

75

-

dB

Vss≤VCM≤5V

TA = +25°C

65

80

-

Vss-0.2VVCMVDD+0.2V

TA = -40°C to +125°C

-

65

-

Power-Supply Rejection Ratio

PSRR

VDD = +2.2V to +5.5V

75

90

-

dB

Open-Loop Voltage Gain

AV

RL=100k to VDD/2,

100mV≤VO≤VDD -125mV

90

100

-

dB

RL=1k to VDD/2,

200mV≤VO≤VDD -250mV

75

85

-

RL=500 to VDD/2,

350mV≤VO≤VDD -500mV

55

65

-

Output Voltage Swing

VOUT

|VIN+-VIN-|  10mV

VDD-VOH

-

10

35

mV

RL = 10k to VDD/2

VOL-VSS

-

10

30

|VIN+-VIN-|  10mV

VDD-VOH

-

80

200

RL = 1k to VDD/2

VOL-VSS

-

50

150

|VIN+-VIN-|  10mV

VDD-VOH

 

100

350

 

 

 

 

 

 

 

 

RL = 500 to VDD/2

VOL-VSS

 

80

260

 

Output Short-Circuit Current

ISC

Sinking or Sourcing

-

50

-

mA

PDB Logic Low

VIL

 

-

-

0.8

V

PDB Logic High

VIH

 

2

-

-

V

Turn-On Time

TON

 

-

2.2

-

μs

Turn-Off Time

TOFF

 

-

0.8

-

μs

Output Leakage Current

ILEAK

Shutdown Mode (PDB = VSS),

VOUT = VSS to VDD

-

0.001

1.0

μA

Input Capacitance

CIN

 

 

10

 

pF

Gain Bandwidth Product

GBW

AV = +1V/V

-

10

-

MHz

Slew Rate

SR

AV = +1V/V

-

4.5

-

V/μs

Full Power Bandwidth

 

Av = +1V/V

-

0.4

-

MHz

Phase Margin

m

Av = +1V/V

-

55

-

deg

Gain Margin

Gm

Av = +1V/V

-

12

-

dB

Settling Time

tS

To 0.01%, VOUT = 2V step

AV = +1V/V

-

1

-

μs

Capacitive-Load Stability

CLOAD

No sustained oscillations.

Av = +1V/V

-

200

-

pF

Peak-to-Peak Input Noise

Voltage (Note 5)

en(p-p)

ƒ = 0.1Hz to 10Hz

-

5

-

Vp-p

Input Voltage Noise Density

en

ƒ = 10Hz

ƒ = 1kHz

ƒ = 30kHz

-

-

-

60

30

15

-

-

-

nV/Hz

Input Current Noise Density

in

ƒ = 1kHz

 

 

 

fA/Hz

Total Harmonic Distortion plus

Noise

THD+N

VOUT = 2Vp-p,

Av = +1V/V, ƒ = 1kHz

RL = 10k to GND ƒ = 20kHz

VOUT = 2Vp-p,

Av = +1V/V, ƒ = 1kHz

RL = 1k to GND ƒ = 20kHz

-

-

-

-

0.0001

0.002

0.0002

0.004

-

-

-

-

%

 

Note 1:  ​​​​ All ​​ devices ​​ are ​​ 100% ​​ production ​​ tested ​​ at ​​ TA = ​​ +25°C; ​​ all ​​ specifications ​​ over ​​ the ​​ automotive ​​ temperature ​​ range ​​ is guaranteed by design, not production tested.

Note 2:  ​​​​ Parameter is guaranteed by design.

Note 3:  ​​​​ Peak-to-peak input noise voltage is defined as six times RMS value of input noise voltage.

 

 

 

Package Information

 

SOP-8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOLS

DIMENSIONS IN MILLIMETERS

DIMENSIONS IN INCHES

MIN

NOM

MAX

MIN

NOM

MAX

A

1.35

--

1.75

0.053

--

0.069

A1

0.10

--

0.25

0.004

--

0.010

b

0.33

--

0.51

0.013

--

0.020

D

4.80

--

5.00

0.189

--

0.197

E

5.80

--

6.20

0.228

--

0.244

E1

3.80

--

4.00

0.150

--

0.157

e

1.27 BSC.

0.050 BSC.

L

0.38

--

1.27

0.015

 

0.050

L1

0.25 BSC.

0.010 BSC.

ZD

0.545 REF.

0.021 REF.

Θ

0

--

0

--

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note:

1. Controlling Dimension:MM

2. Dimension D and E1 do not include Mold protrusion

3. Dimension b does not include dambar ​​ protrusion/intrusion.

4. Refer to Jedec standard MS-012

5. Drawing is not to scale

 

 

 

Package Information

 

MSOP-8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOLS

DIMENSIONS IN MILLIMETERS

DIMENSIONS IN INCHES

MIN

NOM

MAX

MIN

NOM

MAX

A

--

--

1.10

--

--

0.043

A1

0.05

--

0.15

0.002

--

0.006

A2

0.75

0.85

0.95

0.030

0.033

0.037

b

0.25

--

0.40

0.010

--

0.016

C

0.13

--

0.23

0.005

--

0.009

D

2.90

3.00

3.10

0.114

0.118

0.122

E

2.90

3.00

3.10

0.114

0.118

0.122

E1

4.90 BSC

0.193 BSC

e

0.65 BSC

0.026 BSC

L

--

--

0.55

--

--

0.022

Θ

0

--

0

--

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note:

1. Controlling Dimension: MM

2. Dimension D and E1 do not include Mold protrusion

3. Refer to Jedec standard MO187

4. Drawing is not to scale

 

 

 

 


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